IP block signalbehandling
The thesis aims to implement different digital filters such as finite impulse response (FIR), infinite impulse response (IIR) and cascade integrator comb (CIC) on the field-programmable gate array (FPGA) development board using hardware description language (VHDL). To this purpose, Intel’s systems i...
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| Format: | Others |
| Language: | Swedish |
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Uppsala universitet, Institutionen för elektroteknik
2021
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| Online Access: | http://urn.kb.se/resolve?urn=urn:nbn:se:uu:diva-447850 |