Protocol Guided Trace Analysis for Post-Silicon Debug Under Limited Observability
This thesis considers the problem of reconstructing system level behavior of an SoC design from a partially observed signal trace. Solving this problem is a critical activity in post-silicon validation, and currently depends primarily on human creativity and insights. In this thesis, we provide algo...
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| Format: | Others |
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Scholar Commons
2016
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| Online Access: | http://scholarcommons.usf.edu/etd/6475 http://scholarcommons.usf.edu/cgi/viewcontent.cgi?article=7672&context=etd |