Performance-efficient mechanisms for managing irregularity in throughput processors
Recent graphics processing units (GPUs) have emerged as a promising platform for general purpose computing and have been shown to be very efficient in executing parallel applications with regular control and memory access behavior. Current GPU architectures primarily adopt the single-instruction mul...
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| Format: | Others |
| Language: | en |
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2014
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| Online Access: | http://hdl.handle.net/2152/24926 |