Integration of virtual platform models into a system-level design framework

Integration of virtual platform models into a system-level design framework

The fields of System-On-Chip (SOC) and Embedded Systems Design have received a lot of attention in the last years. As part of an effort to increase productivity and reduce the time-to-market of new products, different approaches for Electronic System-Level Design frameworks have been proposed. These...

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Bibliographic Details
Main Author: Salinas Bomfim, Pablo E.
Format: Others
Language:English
Published: 2010
Subjects:
System level design
SLD
Virtual platforms
OVP
QEMU
Emulators
Instruction set simulator
ISS
EDA
SOC
SpecC
SystemC
System-on-chip
Online Access:http://hdl.handle.net/2152/ETD-UT-2010-05-1257

Internet

http://hdl.handle.net/2152/ETD-UT-2010-05-1257

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