Flexible and efficient reliability in memory systems
Future computing platforms will increasingly demand more stringent memory resiliency mechanisms due to shrinking memory cell size, reduced error margins, higher capacity, and higher reliability expectations. Traditional mechanisms, which apply error checking and correcting (ECC) codes uniformly acro...
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| Format: | Others |
| Language: | English |
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2011
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| Online Access: | http://hdl.handle.net/2152/ETD-UT-2011-05-3025 |