Adaptable and enhanced error correction codes for efficient error and defect tolerance in memories
Ongoing technology improvements and feature size reduction have led to an increase in manufacturing-induced parameter variations. These variations affect various memory cell circuits, making them unreliable at low voltages. Memories are very dense structures that are especially susceptible to defect...
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| Format: | Others |
| Language: | English |
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2012
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| Online Access: | http://hdl.handle.net/2152/ETD-UT-2011-12-4614 |