Directive-Based Data Partitioning and Pipelining and Auto-Tuning for High-Performance GPU Computing
The computer science community needs simpler mechanisms to achieve the performance potential of accelerators, such as graphics processing units (GPUs), field-programmable gate arrays (FPGAs), and co-processors (e.g., Intel Xeon Phi), due to their increasing use in state-of-the-art supercomputers. Ov...
Main Author: | |
---|---|
Other Authors: | |
Format: | Others |
Published: |
Virginia Tech
2020
|
Subjects: | |
Online Access: | http://hdl.handle.net/10919/101497 |