An FPGA-based Run-time Reconfigurable 2-D Discrete Wavelet Transform Core
FPGAs provide an ideal template for run-time reconfigurable (RTR) designs. Only recently have RTR enabling design tools that bypass the traditional synthesis and bitstream generation process for FPGAs become available. The JBits tool suite is an environment that provides support for RTR designs on X...
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Virginia Tech
2014
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| Online Access: | http://hdl.handle.net/10919/33649 http://scholar.lib.vt.edu/theses/available/etd-06192001-112019/ |