Implementation and Performance of an Improved Turbo Decoder on a Configurable Computing Machine
Turbo codes are a recently discovered class of error correction codes that achieve near-Shannon limit performance. Because of their complexity and highly parallel nature, turbo-coded applications are well suited for configurable computing. Field-programmable gate arrays (FPGAs), which are the main...
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Virginia Tech
2014
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| Online Access: | http://hdl.handle.net/10919/34038 http://scholar.lib.vt.edu/theses/available/etd-07172000-11270030/ |