An Application Framework for a Power-Aware Processor Architecture

An Application Framework for a Power-Aware Processor Architecture

The instruction-set based general purpose processors are not energy-efficient for event-driven applications. The E-textiles group at Virginia Tech proposed a novel data-flow processor architecture design to bridge the gap between event-driven applications and the target architecture. The architectur...

Full description

Bibliographic Details
Main Author: Mandlekar, Anup Shrikant
Other Authors: Electrical and Computer Engineering
Format: Others
Published: Virginia Tech 2014
Subjects:
Low Power Flash Memory Cells
Model Driven Engineering
Simulink
Dataflow Architecture
Online Access:http://hdl.handle.net/10919/34484
http://scholar.lib.vt.edu/theses/available/etd-08112012-013904/

Internet

http://hdl.handle.net/10919/34484
http://scholar.lib.vt.edu/theses/available/etd-08112012-013904/

Similar Items