Accelerating Incremental Floorplanning of Partially Reconfigurable Designs to Improve FPGA Productivity
FPGA implementation tool turnaround time has unfortunately not kept pace with FPGA density advances. It is difficult to parallelize place-and-route algorithms without sacrificing determinism or quality of results. We approach the problem in a different way for development environments in which some...
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Virginia Tech
2014
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| Online Access: | http://hdl.handle.net/10919/34499 http://scholar.lib.vt.edu/theses/available/etd-08122010-161305/ |