Evaluation Techniques for Mapping IPs on FPGAs
The phenomenal density growth in semiconductors has resulted in the availability of billions of transistors on a single die. The time-to-design is shrinking continuously due to aggressive competition. Also, the integration of many discrete components on a single chip is growing at a rapid pace. Desi...
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Virginia Tech
2014
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| Online Access: | http://hdl.handle.net/10919/34645 http://scholar.lib.vt.edu/theses/available/etd-08192010-185505/ |