The E-algorithm: an automatic test generation algorithm for hardware description languages
Traditional test generation techniques for digital circuits have been rendered inadequate by the increasing levels of integration achieved by VLSI technology. This thesis presents a test generation algorithm, the E-algorithm, that generates tests for circuits described using the VHDL Hardware Descri...
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Virginia Tech
2014
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| Online Access: | http://hdl.handle.net/10919/43260 http://scholar.lib.vt.edu/theses/available/etd-06122010-020406/ |