Multi-processor logic simulation at the chip level
This dissertation presents the design and development of a multi-processor logic simulator. After an introduction to parallel processing, the concept of distributed simulation is described as well as the possibility of deadlock in a distributed system. It is proven that the proposed system does not...
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| Format: | Others |
| Language: | en_US |
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Virginia Polytechnic Institute and State University
2016
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| Online Access: | http://hdl.handle.net/10919/71180 |