Resistive Switching Behavior in Low-K Dielectric Compatible with CMOS Back End Process

In an effort to lower interconnect time delays and power dissipation in highly integrated logic and memory nanoelectronic products, numerous changes in the materials and processes utilized to fabricate the interconnect have been made in the past decade. Chief among these changes has been the replace...

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Bibliographic Details
Main Author: Fan, Ye
Other Authors: Electrical and Computer Engineering
Format: Others
Language:en_US
Published: Virginia Tech 2017
Subjects:
Online Access:http://hdl.handle.net/10919/78172
http://scholar.lib.vt.edu/theses/available/etd-10282016-154542/