A FPGA based low-cost high speed QRD-RLS array processing
Over the last 30 years, Digital Signal Processing algorithm implementation has been driven by the continued progress and availability of high speed FPGA/ASIC circuit technology. The classic method of CORDIC (Coordinate Rotation DIgital Computer) arithmetic has been widely implemented as part of the...
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University of Strathclyde
2012
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| Online Access: | http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.570604 |