A modal logic for handling behavioural constraints in formal hardware verification
The application of formal methods to the design of correct computer hardware depends crucially on the use of abstraction mechanisms to partition the synthesis and verification task into tractable pieces. Unfortunately however, behavioural abstractions are genuine mathematical abstractions only up to...
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University of Edinburgh
1992
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| Online Access: | http://ethos.bl.uk/OrderDetails.do?uin=uk.bl.ethos.657695 |