Tiling and Asynchronous Communication Optimizations for Stencil Computations

Tiling and Asynchronous Communication Optimizations for Stencil Computations

The importance of stencil-based algorithms in computational science has focused attention on optimized parallel implementations for multilevel cache-based processors. Temporal blocking schemes leverage the large bandwidth and low latency of caches to accelerate stencil updates and approach theoretic...

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Bibliographic Details
Main Author: Malas, Tareq Majed Yasin
Other Authors: Keyes, David E.
Language:en
Published: 2015
Subjects:
High Performance Computing
stencil computations
tiling
Online Access:Malas, T. M. Y. (2015). Tiling and Asynchronous Communication Optimizations for Stencil Computations. KAUST Research Repository. https://doi.org/10.25781/KAUST-S60SX
http://hdl.handle.net/10754/583807

Internet

Malas, T. M. Y. (2015). Tiling and Asynchronous Communication Optimizations for Stencil Computations. KAUST Research Repository. https://doi.org/10.25781/KAUST-S60SX
http://hdl.handle.net/10754/583807

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