Low impedance characterisation and modeling of high power LDMOS devices

Low impedance characterisation and modeling of high power LDMOS devices

Thesis (MScEng (Electrical and Electronic Engineering))--University of Stellenbosch, 2005. === In RF power transistor characterisation, the designer is confronted with low impedance measurements (typically from 1 Ohm to 12 Ohm). These transistors are contained in metal-ceramic packages of which th...

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Bibliographic Details
Main Author: Malan, Pieter Jacob De Villiers
Other Authors: Van Niekerk, C.
Format: Others
Published: Stellenbosch : University of Stellenbosch 2006
Subjects:
Low Impedance
Load Line Method
TRL (Thru-Reflect-Line)
Calibration
Substrate Parameter Extraction
Small-Signal Parameter Extraction
Power amplifier
LDMOS
Dissertations > Electrical and electronic engineering
Theses > Electrical and electronic engineering
Online Access:http://hdl.handle.net/10019.1/2510

Internet

http://hdl.handle.net/10019.1/2510

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