System level simulation of digital designs : a case study
Very High Speed Integrated Circuit Hardware Description Language (VHDL) is a hardware description language that is gaining increasing popularity among digital designers in South Africa, as it is both a synthesis and simulation language. Many designers make use of the language's synthesis abilit...
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| Format: | Dissertation |
| Language: | English |
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Faculty of Engineering and the Built Environment
2020
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| Online Access: | https://hdl.handle.net/11427/31852 |