Speeding up the settling of switched-capacitor amplifier blocks in analog-to-digital converters

Speeding up the settling of switched-capacitor amplifier blocks in analog-to-digital converters

Abstract The goal of this dissertation was to study and model the settling transient response of switched-capacitor (SC) circuit, which is the most important building block of Analog-to-Digital converters (ADCs), and to improve the settling performance of the SC circuit implemented in ADC in CMOS t...

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Bibliographic Details
Main Author: Sun, J. (Jia)
Other Authors: Rahkonen, T. (Timo)
Format: Doctoral Thesis
Language:English
Published: Oulun yliopisto 2019
Subjects:
initial input voltage
passive charge redistribution
pipeline Analog-to-Digital converter
settling behavior
sigma-delta Analog-to-Digital converter
sigma-delta modulator
switched-capacitor circuit
SC-piiri
alkutilan jännite
asettuminen
passiivinen varausjakautuminen
pipeline-AD-muunnin
sigma-delta-AD-muunnin
sigma-delta-modulaattori
Online Access:http://urn.fi/urn:isbn:9789526223902
http://nbn-resolving.de/urn:isbn:9789526223902

Internet

http://urn.fi/urn:isbn:9789526223902
http://nbn-resolving.de/urn:isbn:9789526223902

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