Detection of Variable Retention Time in DRAM

Detection of Variable Retention Time in DRAM

This thesis investigates a test method to detect the presence of Variable Retention Time (VRT) bits in manufactured DRAM. The VRT bits retention time is modeled as a 2-state random telegraph process that includes miscorrelation between test and use. The VRT defect is particularly sensitive to test a...

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Bibliographic Details
Main Author: Kumar, Neraj
Format: Others
Published: PDXScholar 2014
Subjects:
Dynamic random access memory > Research > Mathematical models
Electronic noise > Testing > Mathematical models
Other Computer Engineering
Other Electrical and Computer Engineering
Online Access:https://pdxscholar.library.pdx.edu/open_access_etds/2103
https://pdxscholar.library.pdx.edu/cgi/viewcontent.cgi?article=3103&context=open_access_etds

Internet

https://pdxscholar.library.pdx.edu/open_access_etds/2103
https://pdxscholar.library.pdx.edu/cgi/viewcontent.cgi?article=3103&context=open_access_etds

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