High Level Preprocessor of a VHDL-based Design System

High Level Preprocessor of a VHDL-based Design System

This thesis presents the work done on a design automation system in which high-level synthesis is integrated with logic synthesis. DIADESfa design automation system developed at PSU, starts the synthesis process from a language called ADL. The major part of this thesis deals with transforming the AD...

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Bibliographic Details
Main Author: Palanisamy, Karthikeyan
Format: Others
Published: PDXScholar 1994
Subjects:
Electronic digital computers > Circuits > Design
VHDL (Computer hardware description language)
ADL (Computer hardware description language)
Computer algorithms
DIADES (Computer program)
Electrical and Computer Engineering
Online Access:https://pdxscholar.library.pdx.edu/open_access_etds/4776
https://pdxscholar.library.pdx.edu/cgi/viewcontent.cgi?article=5848&context=open_access_etds

Internet

https://pdxscholar.library.pdx.edu/open_access_etds/4776
https://pdxscholar.library.pdx.edu/cgi/viewcontent.cgi?article=5848&context=open_access_etds

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