Hardware Efficient Deep Neural Network Implementation on FPGA

Hardware Efficient Deep Neural Network Implementation on FPGA

In recent years, there has been a significant push to implement Deep Neural Networks (DNNs) on edge devices, which requires power and hardware efficient circuits to carry out the intensive matrix-vector multiplication (MVM) operations. This work presents hardware efficient MVM implementation techniq...

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Bibliographic Details
Main Author: Shuvo, Md Kamruzzaman
Format: Others
Published: OpenSIUC 2020
Subjects:
bit-serial
Convolution neural network (CNN)
Deep neural network (DNN)
early negative detection
IoT
MSB-first
Online Access:https://opensiuc.lib.siu.edu/theses/2792
https://opensiuc.lib.siu.edu/cgi/viewcontent.cgi?article=3806&context=theses

Internet

https://opensiuc.lib.siu.edu/theses/2792
https://opensiuc.lib.siu.edu/cgi/viewcontent.cgi?article=3806&context=theses

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