Generalized buffering of pass transistor logic (PTL) stages using Boolean division and don't cares

Pass Transistor Logic (PTL) is a well known approach for implementing digital circuits. In order to handle larger designs and also to ensure that the total number of series devices in the resulting circuit is bounded, partitioned Reduced Ordered Binary Decision Diagrams (ROBDDs) can be used to gener...

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Bibliographic Details
Main Author: Garg, Rajesh
Other Authors: Khatri, Sunil P.
Format: Others
Language:en_US
Published: Texas A&M University 2007
Subjects:
PTL
Online Access:http://hdl.handle.net/1969.1/5906