Generalized buffering of pass transistor logic (PTL) stages using Boolean division and don't cares
Pass Transistor Logic (PTL) is a well known approach for implementing digital circuits. In order to handle larger designs and also to ensure that the total number of series devices in the resulting circuit is bounded, partitioned Reduced Ordered Binary Decision Diagrams (ROBDDs) can be used to gener...
Main Author: | Garg, Rajesh |
---|---|
Other Authors: | Khatri, Sunil P. |
Format: | Others |
Language: | en_US |
Published: |
Texas A&M University
2007
|
Subjects: | |
Online Access: | http://hdl.handle.net/1969.1/5906 |
Similar Items
-
DISCOVERING MY ARTISTIC VOICE THROUGH THE STAGE ADAPTATION OF WINNERS DON'T QUIT
by: Tyler, Evelyn
Published: (2007) -
Episode 6.05 – Don’t Cares, the Logical Kind
by: Tarnoff, David
Published: (2020) -
Telling the Open Secret: Toward a New Discourse with the U.S. Military’s Don’t Ask Don’t Tell Policy
by: Reichert, Andrew D.
Published: (2010) -
A robust window-based multi-node minimization technique using Boolean relations
by: Cobb, Jeffrey Lee
Published: (2008) -
A robust window-based multi-node minimization technique using Boolean relations
by: Cobb, Jeffrey Lee
Published: (2010)