Power supply noise in delay testing
As technology scales into the Deep Sub-Micron (DSM) regime, circuit designs have become more and more sensitive to power supply noise. Excessive noise can significantly affect the timing performance of DSM designs and cause non-trivial additional delay. In delay test generation, test compaction and...
| Main Author: | |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2010
|
| Subjects: | |
| Online Access: | http://hdl.handle.net/1969.1/ETD-TAMU-1428 http://hdl.handle.net/1969.1/ETD-TAMU-1428 |