Modeling, Optimization and Testing for Analog/Mixed-Signal Circuits in Deeply Scaled CMOS Technologies
As CMOS technologies move to sub-100nm regions, the design and verification for analog/mixed-signal circuits become more and more difficult due to the problems including the decrease of transconductance, severe gate leakage and profound mismatches. The increasing manufacturing-induced process variat...
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| Format: | Others |
| Language: | en_US |
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2011
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| Online Access: | http://hdl.handle.net/1969.1/ETD-TAMU-2009-12-7512 |