Modeling, Optimization and Power Efficiency Comparison of High-speed Inter-chip Electrical and Optical Interconnect Architectures in Nanometer CMOS Technologies

Inter-chip input-output (I/O) communication bandwidth demand, which rapidly scaled with integrated circuit scaling, has leveraged equalization techniques to operate reliably on band-limited channels at additional power and area complexity. High-bandwidth inter-chip optical interconnect architectures...

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Bibliographic Details
Main Author: Palaniappan, Arun
Other Authors: Palermo, Samuel
Format: Others
Language:en_US
Published: 2012
Subjects:
Online Access:http://hdl.handle.net/1969.1/ETD-TAMU-2010-12-8618