Electrical characterization and modeling of low dimensional nanostructure FET

At the beginning of this thesis, basic and advanced device fabrication process which I haveexperienced during study such as top-down and bottom-up approach for the nanoscale devicefabrication technique have been described. Especially, lithography technology has beenfocused because it is base of the...

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Bibliographic Details
Main Author: Lee, Jae Woo
Other Authors: Grenoble
Language:fr
Published: 2011
Subjects:
Online Access:http://www.theses.fr/2011GRENT070/document