Electrical characterization and modeling of low dimensional nanostructure FET
At the beginning of this thesis, basic and advanced device fabrication process which I haveexperienced during study such as top-down and bottom-up approach for the nanoscale devicefabrication technique have been described. Especially, lithography technology has beenfocused because it is base of the...
Main Author: | Lee, Jae Woo |
---|---|
Other Authors: | Grenoble |
Language: | fr |
Published: |
2011
|
Subjects: | |
Online Access: | http://www.theses.fr/2011GRENT070/document |
Similar Items
-
Caractérisation électrique et modélisation des transistors à effet de champ de faible dimensionnalité
by: Lee, Jae woo
Published: (2011) -
Theoretical and numerical modelling of electronic transport in nanostructures
by: Szczęśniak, Dominik
Published: (2013) -
Réalisation et caractérisation de transistors MOS à base de nanofils verticaux en silicium
by: Guerfi, Youssouf
Published: (2015) -
Nanofils magnétiques et semiconducteurs : adressage, caractérisation électriques et magnétiques et applications
by: Klein, Naiara Yohanna
Published: (2015) -
Graphene based mechanical and electronic devices in optimized environments : from suspended graphene to in-situ grown graphene/boron nitride heterostructures
by: Arjmandi-Tash, Hadi
Published: (2014)