GRAPHICAL MODELING AND SIMULATION OF A HYBRID HETEROGENEOUS AND DYNAMIC SINGLE-CHIP MULTIPROCESSOR ARCHITECTURE
A single-chip, hybrid, heterogeneous, and dynamic shared memory multiprocessor architecture is being developed which may be used for real-time and non-real-time applications. This architecture can execute any application described by a dataflow (process flow) graph of any topology; it can also dynam...
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| Format: | Others |
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UKnowledge
2004
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| Online Access: | http://uknowledge.uky.edu/gradschool_theses/249 http://uknowledge.uky.edu/cgi/viewcontent.cgi?article=1252&context=gradschool_theses |