Reliable and Variation-Tolerant Interconnection Network for Low Power MPSOCS
Multi-Processor SoC (MPSOC) design brings to the foreground a large number of challenges, one of the most prominent of which is the design of the chip interconnection. With a number of on-chip blocks presently ranging in the tens, and quickly approaching the hundreds, the novel issue of how to best...
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| Format: | Doctoral Thesis |
| Language: | en |
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Alma Mater Studiorum - Università di Bologna
2012
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| Online Access: | http://amsdottorato.unibo.it/4407/ |