Simulation and design methodology for hybrid SET-CMOS logic at room temperature operation
The purpose of this thesis is to research the possibility of realizing hardware support for hybrid single electron transistor (SET)-CMOS circuits by a systematic approach of design, analysis and simulation. The metallic SET transistors considered in this work are fabricated within the chip interconn...
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| Language: | English |
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Université de Sherbrooke
2012
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| Online Access: | http://hdl.handle.net/11143/6137 |