Accelerating the SM3 hash algorithm with CPU-FPGA Co-Designed architecture

Accelerating the SM3 hash algorithm with CPU-FPGA Co-Designed architecture

SM3 hash algorithm developed by the Chinese Government is used in various fields of information security, and it is being widely used in commercial security products. However, the performance of implementation on the software architecture is not sufficient for high-speed applications. This study pro...

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Bibliographic Details
Main Authors: Guo, Z. (Author), Huang, X. (Author), Song, M. (Author), Zeng, X. (Author)
Format: Article
Language:English
Published: John Wiley and Sons Inc 2021
Subjects:
Application programs
Chinese Government
Coupled environment
cryptography
field programmable gate arrays
Field programmable gate arrays (FPGA)
Government IS
Hash algorithm
Hash functions
Higher speed applications
High-throughput
Integrated circuit design
Logic gates
microprocessor chips
Multiple data streams
parallel architectures
Parallel architectures
Performance
Proposed architectures
Security of data
Security products
software architecture
Software architecture
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