Adapting the RACER Architecture to Integrate Improved In-ReRAM Logic Primitives

Adapting the RACER Architecture to Integrate Improved In-ReRAM Logic Primitives

Modern computing applications based upon machine learning can incur significant data movement overheads in state-of-the-art computers. Resistive-memory-based processing-using-memory (PUM) can mitigate this data movement by instead performing computation in situ (i.e., directly within memory cells),...

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Bibliographic Details
Main Authors: Bain, J.A (Author), Carley, L.R (Author), Ghose, S. (Author), Glass, A. (Author), Hoffmann, A. (Author), Shen, L. (Author), Truong, M.S.Q (Author)
Format: Article
Language:English
Published: Institute of Electrical and Electronics Engineers Inc. 2022
Subjects:
Accelerator architectures
Computation theory
Computer circuits
Computing applications
Data movements
Energy conservation
Learning systems
Logic array
Logic families
memory architecture
Memory architecture
Performance
Peripheral circuitry
Random access memory
Resistance
Resistive memory
resistive RAM
RRAM
State of the art
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