Minimising power dissipation during test application in full scan sequential circuits by primary input freezing
This paper describes a new technique for minimising power dissipation in full scan sequential circuits during test application. The technique increases the correlation between successive states during shifting in test vectors and shifting out test responses by reducing spurious transitions during te...
| Main Authors: | , , |
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| Format: | Article |
| Language: | English |
| Published: |
2000-10.
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| Subjects: | |
| Online Access: | Get fulltext |