Self-aligned silicidation of surround gate vertical MOSFETs for low cost RF applications
We report for the first time a CMOS-compatible silicidation technology for surround-gate vertical MOSFETs. The technology uses a double spacer comprising a polysilicon spacer for the surround gate and a nitride spacer for silicidation and is successfully integrated with a Fillet Local OXidation (FIL...
| Main Authors: | , , , , , , |
|---|---|
| Format: | Article |
| Language: | English |
| Published: |
2010-12.
|
| Subjects: | |
| Online Access: | Get fulltext |