Multi-layer graphene FET compact circuit-level model with temperature effects

This paper presents a circuit-level model of a dual-gate bilayer and four layer graphene field effect transistor (GFET). The model provides an accurate estimation of the conductance at the charge neutrality point (CNP). At the CNP the device has its maximum resistance, at which the model is validate...

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Bibliographic Details
Main Authors: Umoh, Ime Jarlath (Author), Kazmierski, Tom (Author), Al-Hashimi, Bashir (Author)
Format: Article
Language:English
Published: 2014-07.
Subjects:
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