Low-cost on-chip clock jitter measurement scheme
In this paper, we present a low-cost, on-chip clock jitter digital measurement scheme for high performance microprocessors. It enables in situ jitter measurement during the test or debug phase. It provides very high measurement resolution and accuracy, despite the possible presence of power supply n...
| Main Authors: | , , , , , , |
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| Format: | Article |
| Language: | English |
| Published: |
2014-04-11.
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| Subjects: | |
| Online Access: | Get fulltext |