Anomalous DIBL Effect in Fully Depleted SOI MOSFETs Using Nanoscale Gate-Recessed Channel Process

Nanoscale Gate-Recessed Channel (GRC) Fully Depleted- (FD-) SOI MOSFET device with a silicon channel thickness (tSi) as low as 2.2 nm was first tested at room temperature for functionality check and then tested at low temperature (77 K) for I-V characterizations. In spite of its FD-SOI nanoscale thi...

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Bibliographic Details
Main Authors: Avi Karsenty, Avraham Chelly
Format: Article
Language:English
Published: Hindawi Limited 2015-01-01
Series:Active and Passive Electronic Components
Online Access:http://dx.doi.org/10.1155/2015/609828