Built-In-Self-Test for Embedded memories
碩士 === 國立中興大學 === 資訊科學研究所 === 87 === Recently, integration of system into a chip becomes very popular. In testing of highly integrated chip, one difficult problem is embedded memory testing. It is hard to test embedded memory because direct controllability and observability are extremely...
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ndltd-TW-087NCHU03940082016-02-03T04:32:46Z http://ndltd.ncl.edu.tw/handle/31600621186037796464 Built-In-Self-Test for Embedded memories 內嵌式記憶體的內建自我測試 Chen-Jung Wei 魏震榮 碩士 國立中興大學 資訊科學研究所 87 Recently, integration of system into a chip becomes very popular. In testing of highly integrated chip, one difficult problem is embedded memory testing. It is hard to test embedded memory because direct controllability and observability are extremely low. To solve this problem, Built-In Self Test (BIST) technique is widely used in embedded memory testing. Pseudo-random (PR) memory tests are tests which have the capability to detect any fault (defect) of any model, albeit with some probability less than 100%; the fault coverage is modular and depends on the test time, which makes them very attractive. In this paper we describe a new method to improve the explicit memory test with word operations (DADWRD). By complement the written data, we could increase the probability of the detection. For the more, we modify the Markov chain of DADWRD to suitable our new algorithm. We prove that new method could reduce the test length coefficients, and the increase of area overhead is small. Sying-Jyan Wang 王行健 1999 學位論文 ; thesis 71 zh-TW |
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碩士 === 國立中興大學 === 資訊科學研究所 === 87 === Recently, integration of system into a chip becomes very popular. In testing of highly integrated chip, one difficult problem is embedded memory testing. It is hard to test embedded memory because direct controllability and observability are extremely low. To solve this problem, Built-In Self Test (BIST) technique is widely used in embedded memory testing.
Pseudo-random (PR) memory tests are tests which have the capability to detect any fault (defect) of any model, albeit with some probability less than 100%; the fault coverage is modular and depends on the test time, which makes them very attractive.
In this paper we describe a new method to improve the explicit memory test with word operations (DADWRD). By complement the written data, we could increase the probability of the detection. For the more, we modify the Markov chain of DADWRD to suitable our new algorithm. We prove that new method could reduce the test length coefficients, and the increase of area overhead is small.
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Sying-Jyan Wang |
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Sying-Jyan Wang Chen-Jung Wei 魏震榮 |
author |
Chen-Jung Wei 魏震榮 |
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Chen-Jung Wei 魏震榮 Built-In-Self-Test for Embedded memories |
author_sort |
Chen-Jung Wei |
title |
Built-In-Self-Test for Embedded memories |
title_short |
Built-In-Self-Test for Embedded memories |
title_full |
Built-In-Self-Test for Embedded memories |
title_fullStr |
Built-In-Self-Test for Embedded memories |
title_full_unstemmed |
Built-In-Self-Test for Embedded memories |
title_sort |
built-in-self-test for embedded memories |
publishDate |
1999 |
url |
http://ndltd.ncl.edu.tw/handle/31600621186037796464 |
work_keys_str_mv |
AT chenjungwei builtinselftestforembeddedmemories AT wèizhènróng builtinselftestforembeddedmemories AT chenjungwei nèiqiànshìjìyìtǐdenèijiànzìwǒcèshì AT wèizhènróng nèiqiànshìjìyìtǐdenèijiànzìwǒcèshì |
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