A new switching scheme for parabolic error compensation in 10 bit CMOS current steering digital to analog converter
碩士 === 國立臺灣大學 === 電子工程學研究所 === 94 === This thesis proposes a 10 bit 250MHz current steering DAC with a doubly segmented current steering architecture that consists of two parts: upper 5 bit MSBs and intermediate 2 bit MSBs. The other 3 bit LSBs are binary weighted current source. This design not onl...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2006
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| Online Access: | http://ndltd.ncl.edu.tw/handle/21328668856152205743 |