On-Chip Delay Testing for Multiple ClockDomain Cores on SoC Test Platform
碩士 === 國立成功大學 === 電機工程學系碩博士班 === 97 === Since the development of the semiconductor technology has been greatly advanced, SoC designs integrate an increasing number of cores with different functionality to reduce the total cost of products. However, the SoC-based design methodology also induces many...
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| Format: | Others |
| Language: | en_US |
| Published: |
2009
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| Online Access: | http://ndltd.ncl.edu.tw/handle/80058308421911870810 |