A Partition-based Methodology for Simulation Acceleration of Leakage Power Estimation
碩士 === 元智大學 === 資訊工程學系 === 97 === Continuous decrease in feature size results in more transistors per area and more logic modules in a circuit. These changes in transistor density and integration scale of VLSI circuits make power consumption a more important and critical issue. Because of the transi...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2008
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| Online Access: | http://ndltd.ncl.edu.tw/handle/49712264579121460848 |