Simultaneous Test Pattern Generation for Clock Delay Fault and Transition Fault Based on Launch-on-Capture Test Architecture
碩士 === 國立中興大學 === 資訊科學與工程學系所 === 101 ===
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2013
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| Online Access: | http://ndltd.ncl.edu.tw/handle/01051889996238431995 |