Leakage and Glitch Power Minimization for Nonzero Clock Skew Circuits
碩士 === 中原大學 === 電子工程研究所 === 102 === Due to technology scaling, the leakage power reduction problem has attracted a lot of attention. Besides, in a circuit, glitches (spurious transitions) happen if a signal goes through several state changes before it reaches its steady state within a clock cycle. A...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2014
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| Online Access: | http://ndltd.ncl.edu.tw/handle/09344068871081089023 |