Fast Incremental Timing and Incremental CPPR Analysis
碩士 === 國立交通大學 === 電子工程學系 電子研究所 === 104 === Static timing analysis is a key step to verify timing closure for modern IC designs. However,fast growing design complexities and increasing on-chip variations complicate this process.To capture more accurate performance of a design, common path pessimism r...
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| Format: | Others |
| Language: | zh-TW |
| Published: |
2015
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| Online Access: | http://ndltd.ncl.edu.tw/handle/44492499171358182367 |