A Low Power Pipeline ADC Using Time-Domain Transfer Technique
碩士 === 國立臺灣大學 === 電子工程學研究所 === 104 === This thesis proposes a 10bit, 300MHz pipeline ADC. Due to the design difficulty in advanced process and large power consumption of operation amplifier(opamp). The proposed work wants to avoid using operation amplifier. At the same time, the time resolution in a...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2016
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| Online Access: | http://ndltd.ncl.edu.tw/handle/20038403707009700376 |