Design, Process, and Characterization of Complementary Metal-Oxide-Semiconductor Circuits and Six-Transistor Static Random-Access Memory in 4H-SiC

In this study, the performance of complementary metal oxide semiconductor (MOS) circuits fabricated on SiC substrates was investigated by designing several digital and analog circuits, and a unique process flow was developed to integrate n-type MOS (NMOS) and p-type MOS (PMOS) transistors with low a...

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Bibliographic Details
Main Authors:	Hung, C.-L (Author), Lin, L.-J (Author), Tsai, T.-K (Author), Tsui, B.-Y (Author), Wen, Y.-X (Author)
Format:	Article
Language:	English
Published:	IOP Publishing Ltd 2022
Subjects:	CMOS integrated circuits Complementary metal-oxide-semiconductor complementary metal-oxide-semiconductor (CMOS) compromised gate dielectric Compromized gate dielectric Design-process Dielectric devices Gate dielectrics Integrated circuit integrated circuit (IC) Integrated circuit design Local oxidation local oxidation of SiC (LOCOSiC) isolation Local oxidation of SiC isolation Metallic compounds Metals MOS devices MOSFET devices Oxide semiconductors Performance Process flows Semiconducting silicon SiC Silicon carbide Static random access memory Static random access storage Static random-access memory static random-access memory (SRAM) Substrates Threshold voltage Timing circuits Wide band gap semiconductors
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Design, Process, and Characterization of Complementary Metal-Oxide-Semiconductor Circuits and Six-Transistor Static Random-Access Memory in 4H-SiC

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